• nvSRAM™ Architecture
• Process Technology
• Features and Benefits
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nvSram™ Architecture
Our patented nvSRAM™ architecture uses a one-to-one pairing of a non-volatile bit and a fast SRAM bit in each memory cell. In system operation, the IC’s behave exactly as standard fast SRAM and can be easily interfaced to existing microprocessors and microcontrollers. When IC power is disrupted or lost, the event is detected, and in one quick array write, every SRAM bit is saved into nonvolatile (in under 13ms) using the saved energy in a small capacitor. Data is automatically recalled from non-volatile to SRAM in every cell on power restore.

The nvSRAM architecture allows infinite read/writes and access times down to 15ns because of the use of standard SRAM. The non-volatile cells exceed 20 year data retention ratings in all specified temperature ranges (commercial, industrial, and military).

This proprietary approach eliminates unreliable batteries from the system design while offering the smallest board space area and bills-of material.